1. Field of the Invention
This invention relates generally to circuit fabrication and rework procedures and, more particularly, to a system and method for removing and replacing solder balls on ball grid array type circuit packages.
2. Description of the Related Art
Solder balls are used to make circuit interconnections, between ceramic, printed circuit boards, chip scale packages, and integrated circuit (IC) flip chips. There are a variety of solder ball connection processes that are generally related, but differ in terms of scale the size of the circuit packages and the solder balls.
As noted in U.S. Pat. No. 5,274,913 (Grebe et al.), which is incorporated herein by reference, within a single integrated circuit, circuit component to circuit component and circuit to circuit interconnection, heat dissipation, and mechanical protection are provided by an integrated circuit chip. This chip enclosed within its module is referred to as the first level of packaging. There is at least one further level of packaging. The second level of packaging is the circuit card. A circuit card performs several functions. The circuit card is employed because the total required circuit or bit count to perform a desired function exceeds the bit count of the first level package, i.e., the chip. The circuit card also provides for signal interconnection with other circuit elements, other circuit cards, or carrier substrates.
In order for the card to accomplish these functions the I/C chip must be bonded to the card, and connected to the wiring of the card. When the number of I/O""s per chip was low, serial wire bonding of the I/O""s around the periphery of the chip was a satisfactory interconnection technology. But, as the number of I/O""s per chip has increased, tape automated bonding (hereinafter xe2x80x9cTABxe2x80x9d bonding) has supplanted serial wire bonding. To handle an even larger number of I/O""s per chip various xe2x80x9cflip chipxe2x80x9d bonding methods were developed. In these so-called xe2x80x9cflip chipxe2x80x9d bonding methods the face of the IC chip is bonded to the card.
Flip-chip bonding permits the formation of a pattern of solder bumps on the entire face of the chip. In this way, the use of a flip chip package allows full population area arrays of I/O. In the flip chip process, solder bumps are deposited on solder wettable terminals on the chip and a matching footprint of solder wettable terminals are provided on the card. The chip is then turned upside down, hence the name xe2x80x9cflip chip,xe2x80x9d the solder bumps on the chip are aligned with the footprints on the substrate, and the chip to card joints are all made simultaneously by the reflow of the solder bumps.
In the controlled collapse chip connection (C4) process, as distinguished from the earlier flip chip process, the solder wettable terminals on the chip are surrounded by ball limiting metallurgy (xe2x80x9cBLMxe2x80x9d), and the matching footprint of solder wettable terminals on the card are surrounded by glass dams or stop-offs, which are referred to as top surface metallurgy (xe2x80x9cTSMxe2x80x9d). These structures act to limit the flow of molten solder during reflow.
The ball limiting metallurgy (xe2x80x9cBLMxe2x80x9d) on the chip is typically a circular pad of evaporated, thin films of Cr, Cu, and/or Au. The Cr dam formed by this conductive thin film well restrains the flow of the solder along the chip, seals the chip module, and acts as a conductive contact for the solder. In prior art processes the BLM and solder are deposited by evaporation through a mask, forming an array of I/O pads on the wafer surface. The term xe2x80x9cmaskxe2x80x9d is used generically. The mask can be a metal mask. Alternatively, as used herein, the xe2x80x9cmaskxe2x80x9d can refer to a sequence of BLM deposition, photoresist application, development of the photoresist, and deposition, as described below, of solder, followed by simultaneous removal of the photoresist and subetching of the BLM, with the solder column acting as a mask.
In C4 processes, the Pb/Sn is typically deposited from a molten alloy of Pb and Sn. The Pb has a higher vapor pressure then Sn, and deposits first, followed by a cap of Sn. The solder is deposited on the chip by evaporation, vacuum deposition, vapor deposition, or electrodeposition into the above described BLM wells, thereby forming solder columns therein. The resulting solder deposit, referred to herein as a column or a ball, is a cone-frustrum body of Pb surrounded by an Sn cap. This column or ball may be reflowed, for example by heating in an H2 atmosphere, to homogenize the solder and form solder bumps for subsequent bonding.
The solder is typically a high lead solder, such as 95 Pb/5 Sn. In conventional C4 processes, 95/5 solders are preferred because the high lead solders of this stoichiometry have a high melting point, e.g., above about 315 degrees Centigrade. Their high melting temperature allows lower melting point solders to be used for subsequent connections in the microelectronic package.
The wettable surface contacts on the card are the xe2x80x9cfootprintxe2x80x9d mirror images of the solder balls on the chip I/O""s. The footprints are both electrically conductive and solder wettable. The solder wettable surface contacts forming the footprints are formed by either thick film or thin film technology. Solder flow is restricted by the formation of dams around the contacts.
The chip is aligned with the card and then joined to the card by thermal reflow. Typically, a flux is used in the C4 processes. The flux is placed on the substrate, or chip, or both, to hold the chip in place. The assembly of chip and card is then subject to thermal reflow in order to join the chip to the card. After joining the chip and card it is necessary to remove the flux residues. This requires the use of organic solvents, such as aromatic solvents and halogenated hydrocarbon solvents, with their concomitant environmental concerns.
The C4 process is a substantially self-aligning assembly process. This is because of the interaction of the geometry of the solder columns or balls prior to reflow, with the surface tension of the molten solder during reflow and geometry of the solder columns. When the mating surfaces of solder column on the chip and the conductive footprint contact on the card touch, the surface tension of the molten solder promotes self alignment.
As in all solder processes, rework may be needed when solder balls are used, due to alignment problems, process temperatures, accidental solder bridging between pads on the circuit package, and damage to the solder balls themselves. Solder ball reworking (reballing) is typically accomplished through a reflow process. The detailed process steps are:
1. demounting solder ball components on the circuit package;
2. removing the solder residue through a solder wicking, hot gas dress tool, or similar process;
3. positioning the solder paste or flux;
4. replacing the solder balls; and
5. reflowing, to attach the solder balls.
One of the key steps in the aforementioned reballing process is the demounting, which requires the heating of the package to an elevated temperature. Heating is a conventional solution for eutectic solder balls or eutectic/high lead ball connection such as in the traditional ceramic BGA (CBGA) packages. However, it is not a solution for the high lead ball grid array (BGA) ball configuration.
The problem with heating the package to remove high lead solder balls is the high temperature needed to melt the high lead solder. For example, the melting temperature of 90% lead (Pb)/10% tin (Sn) solder is approximately 308 degrees C. However, the finished package contains other materials, such as molding compounds, underfill, lid attach, and die attach materials, that may be damaged at the relatively high temperatures needed to reflow high lead solder.
Another problem in the above-mentioned rework process stems from the non-uniform wettable surface that results from removing the solder balls at melting temperature. Neither does this rework process address the issue of solder particle contamination that can occur in the high temperature solder ball removal process.
It would be advantageous if an efficient procedure could be developed to remove high lead solder balls from a ball grid type array package.
It would be advantageous if the high lead balls could be removed without a high temperature reflow process.
It would be advantageous if a solder ball removal process could provide a uniform wettable surface from ball reattachment.
It would also be advantageous if a process could efficiently reattach high lead solder balls to a circuit package without a high temperature reflow process.
Accordingly, a method is provided for removing solder balls attached to a ball grid array circuit package. The method is useful for BGA balls, C4 balls, chip scale package (CSP) balls, flip chip bumps, and solder columns.
The method comprises: forming a thin stainless steel mask, with a thickness of about 2 mils overlying a first surface of a ball grid array circuit package, to expose high lead solder balls attached to pad areas of the surface; removing enough of the exposed solder balls, using a grinding or shearing operation to leave a ball residue attached to the surface pads; removing the thin film mask; forming a thick film mask overlying the first surface that exposes the ball residue attached to the surface pads; depositing solder paste over the ball residue; and, heating the solder paste to a temperature in the range of 183 to 225 degrees C.
The thick film mask has a thickness in the range from 5 to 10 mils. The method also comprises forming openings in the thick film mask to define an aspect ratio, which is the ratio of the mask thickness to the area of the opening. A lower range aspect ratio is helpful in improving the release of the deposited solder paste in response to the lower range aspect ratio mask openings. A higher range aspect ratio, however, is helpful in increasing the volume of the deposited solder paste, making the solder ball reattachment easier. Likewise the opening diameters can be sized to increase or decrease the volume of deposited solder paste.